Proc. of SPIE 10107, 1010708 (Feb 2017)
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Proc. of SPIE 10107, 1010708 (Feb 2017)
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Rapid virtual prototyping of complex photonic integrated circuits using layout-aware schematic-driven design methodology
S. Mingaleev, A. Richter, E. Sokolov, S. Savitzki, A. Polatynski, J. Farina, and I. Koltchanov,
Proc. SPIE 10107 -- Smart Photonic and Optoelectronic Integrated Circuits XIX, 1010708 - 14 pages (2017).
[Full-text PDF (1.8 Mb)] [Online]
Abstract: We present our versatile simulation framework for the schematic-driven and layout-aware design of photonic integrated circuits (PICs) realizing a fast and user-friendly design flow for large-scale PICs comprising passive and active building blocks (BBs). We show how the seamless interaction of circuit simulation with photonic layout design tools allows to specify and utilize directly physical locations and orientations of BBs of standardized process design kits (PDKs). We demonstrate how to combine graphical schematic capture and automated waveguide routing, and discuss by means of typical design applications how an optimized design flow can speed-up the virtual prototyping of complex PICs and optoelectronic applications.

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  © Sergei Mingaleev